A single flux quantum (SFQ) logic cell library has been developed for the 10 kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In the new cell library, the critical current density of Josephson junctions is increased from 2.5 kA/cm2 to 10 kA/cm2 compared to our conventional cell library, and the McCumber-Stwart parameter of each Josephson junction is increased to 2 in order to increase the circuit operation speed. More than 300 cells have been designed, including fundamental logic cells and wiring cells for passive interconnects. We have measured all cells and confirmed they stably operate with wide operating margins. On-chip high-speed test of the toggle flip-flop (TFF) cell has been performed by measuring the input and output voltages. The TFF cell at the input frequency of up to 400 GHz was confirmed to operate correctly. Also, several fundamental digital circuits, a 4-bit concurrent-flow shift register and a bit-serial adder have been designed using the new cell library, and the correct operations of the circuits have been demonstrated at high clock frequencies of more than 100 GHz.

All MgB2 Josephson junctions with amorphous boron barriers have been fabricated on C-plane sapphire substrates by using a co-evaporation method. The junctions showed Josephson currents and the nonlinear current-voltage characteristics which seem to reflect the superconducting energy gap. The critical current was observed when the thickness of the amorphous boron was in the range of 5 nm to 20 nm. The critical current density was estimated to be 0.4 A/cm2 to 450 A/cm2. By observing he temperature dependence of the critical current we found that the junction had a critical temperature of 10 K and a normal layer in its barrier structure.

We developed an Nb-based fabrication process for single flux quantum (SFQ) circuits in a Japanese government project that began in September 2002 and ended in March 2007. Our conventional process, called the Standard Process (SDP), was improved by overhauling all the process steps and routine process checks for all wafers. Wafer yield with the improved SDP dramatically increased from 50% to over 90%. We also developed a new fabrication process for SFQ circuits, called the Advanced Process (ADP). The specifications for ADP are nine planarized Nb layers, a minimum Josephson junction (JJ) size of 11 µm, a line width of 0.8 µm, a JJ critical current density of 10 kA/cm2, a 2.4 Ω Mo sheet resistance, and vertically stacked superconductive contact holes. We fabricated an eight-bit SFQ shift register, a one million SQUID array and a 16-kbit RAM by using the ADP. The shift register was operated up to 120 GHz and no short or open circuits were detected in the one million SQUID array. We confirmed correct memory operations by the 16-kbit RAM and a 5.7 times greater integration level compared to that possible with the SDP.

A measurement system is developed to observe the switching current distribution in Bi2Sr2CaCu2O8+δ intrinsic Josephson junctions (IJJ's). We have designed the frequency responses of filters and cables to achieve the compatibility of sufficient isolation at high frequency region and accurate detection of the distribution at low frequency region. The temperature dependence of the switching current distributions measured on a IJJ by the present system agrees well with the theoretical calculation in the temperature range from 70 mK to 5 K. The consistency of the crossover temperature between experimental result and calculation suggests that the designed measurement system succeeded in observing the macroscopic quantum tunneling process.

The utilization of a high-Tc superconductor for implementing a superconducting qubit is to be expected. Recent researches on the quantum property of Josephson junctions in high-Tc superconductors indicate that the low energy quasiparticle excitation is weak enough to observe the macroscopic quantum tunneling. Therefore, a detailed study on the quantum property of high-Tc Josephson junctions becomes more important for applications. We show our experimental results of the macroscopic tunneling of current biased intrinsic Josephson junctions in Bi-2212 and its resonant activation in the presence of microwave radiation.

We have fabricated a multilayer structure for single flux quantum (SFQ) circuit application using a high-temperature superconductor (HTS). La0.2-Y0.9Ba1.9Cu3Ox (La-YBCO) base electrode layers were prepared by a dc or rf magnetron sputtering method. The reproducibility of film quality for dc-sputtered La-YBCO films was better than that for rf-sputtered films, and the dc sputtered films exhibited the average surface roughness Ra less than 1.0 nm and a Tc zero value of 88 K. By using the dc-sputtered La-YBCO films, a multilayer structure of SrSnO3/La-YBCO/SrSnO3/La-YBCO on MgO substrate with Ra below 2.0 nm was obtained. Interface-modified ramp-edge junctions with La0.2-Yb0.9Ba1.9Cu3Ox (La-YbBCO) counter electrodes have been fabricated by using this multilayer structure with dc-sputtered films. The fabricated junctions exhibited RSJ-type I-V characteristics with IcRn products of about 3 mV at 4.2 K. We also obtained a 1-σ Ic spread of 8% for a 1000-junction series-array. The sheet inductance values at 4.2 K for the base and counter electrodes on La-YBCO ground planes were 0.8 pH and 0.7 pH per square, respectively. Operation of several types of elementary SFQ circuits has been successfully demonstrated by using this multilayer structure.

We briefly survey recent developments in the thin film synthesis and junction fabrication of MgB2 toward superconducting electronics. The most serious problem in the thin film synthesis of MgB2 is the high vapor pressure required for phase stability. This problem makes in-situ film growth difficult. However, there has been substantial progress in thin film technology for MgB2 in the past three years. The low-temperature thin-film process in a UHV chamber can produce high-quality MgB2 films with Tc 35 K. Furthermore, technology to produce single-crystal epitaxial MgB2 films has recently been developed by using hybrid physical-chemical vapor deposition. With regard to Josephson junctions, various types of junctions have been fabricated, all of which indicate that MgB2 has potential for superconducting devices that operate at 20-30 K, the temperature reached by current commercial cryocoolers.

The deposition conditions of Y0.9Ba1.9La0.2Cu3Oy (La-YBCO) and (LaAlO3)0.3-(SrAl0.5Ta0.5O3)0.7 (LSAT) thin films were studied with the aim of fabricating ramp-edge Josephson junctions on a superconducting ground plane. These films were deposited by a magnetron sputtering method and utilized as a base electrode and an insulating layer under the electrode, respectively. YBa2Cu3Oy thick films grown by liquid phase epitaxy (LPE-YBCO) were used for a ground plane. Insertion of a SrTiO3 buffer layer between LSAT and LPE-YBCO significantly improved the flatness of the film surface. La-YBCO films with a flat surface and Tc (zero) of 87K were reproducibly obtained by DC sputtering. We have fabricated ramp-edge Josephson junctions using these films. Resistively and capacitively shunted junction (RCSJ)-like characteristics were observed in them. An Ic spread of 10.2% (at 4.2K, average Ic = 0.5 mA) was obtained for a 1000-junction series-array.

In-plane-aligned a-axis-oriented YBa2Cu3O7-δ (YBCO) thin films are attractive for the formation of planar intrinsic Josephson devices. In this study, these films were deposited by dc sputtering on LaSrGaO4 (LSGO) (100) substrates and the dependence of the characteristics on the deposition conditions was investigated. In-plane-aligned a-axis-oriented YBCO thin films were successfully grown in the substrate temperature range of 555-615. With the temperature gradient method, it was seen that the critical temperature of the film increased to 81 K. The current-voltage characteristic along the c-axis exhibited clear multibranch structures. These results indicate that ion-cleaning of the substrate surface broadens the growth temperature range of these films and planar intrinsic Josephson devices can be fabricated from these films.

The capability of a high-temperature superconducting sigma-delta modulator was studied by means of circuit simulation and FFT analysis. Parameters for the circuit simulation were extracted from experimental measurements. The present circuit simulation includes thermal-noise effect. Successive FFT analyses were made to evaluate the dynamic range of the sigma-delta modulator. As a result, the dynamic range was evaluated as 60.1 dB at temperature of 20 K and 56.9 dB at temperature of 77 K.

We investigated single flux quantum sinc filters with multistage decimation structure in order to realize high-speed sinc filter operation. Second- and third-order (k=2, 3) sinc filters with a decimation factor N=2 were designed and confirmed their proper operations. These sinc filters with N=2 are utilized as elementary circuit blocks of our multistage decimation sinc filters with N=2M, where M indicates the number of the stage of the decimation. As an example of the multistage decimation filter, we designed a k=2, N=4 sinc filter which was formed from a two-stage decimation structure using k=2, N=2 sinc filters, and confirmed its proper operation. The k=2, N=4 sinc filter consisted of 1372 Josephson junctions with the power consumption of 191 µW.

The size dependent properties of the intrinsic Josephson junctions in Bi2Sr2CaCu2Oy single crystal mesas in the external magnetic field are studied. The mesas of (1-140) µm long with 7-29 junctions were fabricated and their current-voltage characteristics were measured in external magnetic field applied parallel to the CuO2 layers up to 0.16 T. In zero magnetic field, multiple resistive branches with large hysteresis were observed in the current-voltage characteristics for the fabricated mesas. Almost identical critical currents were also observed for all the junctions in each mesa. With applied magnetic field, Ic of the longer mesas showed a complex magnetic field dependence as compared to that of the short mesas (of about 1 µm in length). It was observed that the lower critical magnetic field of the junctions decreased and approached a constant value with increasing number of junctions and also with increasing length of the junctions. Similar magnetic behavior was obtained by numerical simulations based on coupled sine-Gordon equations for such stacked junctions.

We fabricated ramp-edge junctions with barriers by modifying surface and integrating ground-planes. The fabricated junctions had current-voltage characteristics consistent with the resistive shunted-junction model. We also obtained a 1-sigma spread in the critical current of 7.9% for 100 junctions at 4.2 K. The ground-plane reduced the sheet inductance of a stripline by a factor of 3. The quality of the ground-plane was improved by using an anneal in oxygen atmosphere after fabrication. The sheet inductance of a counter-electrode with a ground-plane was 1.0 pH per square at 4.2 K.

We have fabricated ramp-type Josephson junctions in trilayer structures. A bilayer of YBa2Cu3O7-x (YBCO)/CeO2 was deposited on a SrTiO3 (100) substrate. Then, circle patterns with a diameter of 2 µm were etched on the bilayer surface using standard photolithography process. During the Ar ion milling with an incident angle of 45 degrees to the bilayer surface, the sample was rotated. This process led to upside-down conical formations. After the ramp-edge surface was modified, another YBCO film was deposited for the top electrode. The junctions showed the I-V characteristics between resistively shunted junction and flux-flow types.

We have fabricated a novel type of intrinsic Josephson junctions with superconducting Bi2Sr2CaCu2O8+y (Bi-2212)/YBa2Cu3O7-x(YBCO) bilayer thin films deposited on MgO(100) substrates. We used the 4th harmonics of a Nd:YAG pulsed laser ablation. Furthermore, we studied the transport properties of a 25 µm 25 µm Bi-2212/YBCO mesa-type junction. The zero resistance temperature was around 50 K. The current-voltage characteristics showed flux-flow-like behavior and a supercurrent of about 2 mA at 4.2 K. Shapiro steps were observed when microwave was irradiated to the mesa junction. These Shapiro steps are attributed to the Josephson junction formed at the interface between the Bi-2212 and YBCO layers in the mesa structure and not to the intrinsic Josephson junctions in the Bi-2212 layer or the micro-grains within the films.

We report some leading research on superconducting devices in Taiwan. Research includes thin films, Josephson junctions, junction arrays and resonators etc. In device physics characteristics of Josephson junctions, junction array, and SQUIDs are reported. Applications of SQUIDs include: (1) studies of brain activities (magnetoencenphalogram) using multichannel low Tc SQUIDs system; (2) detection of weak magnetic fields (magnetocardiogragh, etc. ) using high-Tc SQUIDs; (3) nondestructive evaluation (NDE) of deep flaws using high-Tc SQUIDs. Research projects in the future in our group are briefly reported.

We have quantitatively and systematically investigated the effect of parasitic inductance on rapid single flux quantum (RSFQ) circuits by numerical simulation. While a parasitic inductance in parallel to a junction has virtually no effect on the circuit performance, a parasitic inductance in series with a junction significantly reduces the operating margins and speeds of circuits that have been optimized with the assumption that no parasitic inductance exists. To improve the reduced margins and speeds we have re-optimized the circuits for operation with parasitic inductance. While the speeds are sufficiently improved by the re-optimization procedure, the margins do not reach those without the parasitics. This suggests that the parasitic inductance shrinks the operating regions of the circuits and improvement of the margins by changing only the values of the parameters is limited. For further improvement of the margins it is important to employ processes and layouts that minimize the series parasitic inductance.

Fabrication technology for Nb integrated circuits has been developed. In developing fabrication technology, the key process steps are the etching to form fine Nb electrodes and the formation of reliable insulation layers. The standard process has been developed focusing on reproducibility and reliability. In the process, conventional reactive ion etching and RF bias-sputter deposition are used. The number of Nb wiring layers is two, and standard deviation (σ) of critical current is 0.9%, 2.3%, and 4.7% for the junction sizes of 2 µm, 1.4 µm, and 1 µm, respectively. The advanced process has also been developed focusing on capability of increasing the integration scale. Electron-cyclotron-resonance plasma etching and mechanical polishing planarization have been developed as advanced process technology. The number of Nb wiring layers is three, and σ is improved to 0.8%, 0.7%, and 1.7% for the junction sizes of 2 µm, 1.4 µm, and 1 µm, respectively. Integration limits are discussed and it is estimated that the maximum number of junctions is in the order of 105 and 107 for the standard and the advanced process, respectively. A large-scale superconducting circuit such as a several M-bit RAM can be realized in the future by using these fabrication technologies.

In this paper, we describe our superconducting digital technology that uses Nb/AlOx/Nb Josephson junctions. Superconducting devices have intrinsically superior characteristics than those of semiconductor devices, and Nb/AlOx/Nb junctions have ideal current-voltage characteristics for digital applications. Superconducting devices that use Nb/AlOx/Nb junctions have being actively developed because of their high speed and low power characteristics. Presently, we can fabricate more than twenty thousand junctions on one chip. Using niobium technology, a superconducting 4-kbit RAM has been already successfully developed. We have demonstrated the operation of a network system with a superconducting network chip. Some problems, such as difficulty in high-speed testing, disturbance from trapped magnetic flux and so on, have been overcome by techniques such as a clock-driven testing method, moat structures and so on. The developed technologies, such as the fabrication technology, the design technology for moat structures and so on, must become the basic keys for the development of digital applications based on a single flux quantum device, which will be a promising component for ultra-high speed systems in the twenty-first century.

Recent progress of high-temperature superconductor Josephson junction technology is reviewed in the light of the future application to digital circuits. Among various types of Josephson junctions so far developed, ramp-edge-type junctions with a barrier layer composed of oxide materials in the vicinity of metal-insulator transition seem to offer a unique opportunity to fulfill all the requirements for digital circuit applications by virtue of their small junction dimensions, overdamped properties and relatively high IcRn product values at the temperature of around 30-40 K. Recently developed interface engineered junctions can be classified as junctions of this type. These junctions also raise an interesting problem in physics concerning the possibility of resonant tunneling of Cooper pairs via localized states in the barrier. From the viewpoint of practical applications, the improvement of the spread of the junction parameters is still a serious challenge to the present fabrication technology. Although interface engineered junctions seem to be most promising in this regard at present, 1σ spread of around 8% in the present fabrication technology is far from satisfactory for the fabrication of large-scale integrated circuits. The detailed understanding of the barrier formation mechanism in the interface engineered junction is indispensable not only for advancing this particular fabrication technology but also for improving other junction technology utilizing ramp-edge structures.